#ifndef __UDSF_LPW_C__
#define __UDSF_LPW_C__

#include "app.h"

/*
*   notice:
*   UDSF 同UDF编程：不可调用cstd-lib,只可调用"sdk_ifs_udk_cfg.h"、"sys_api.h"中列出的API函数。
*   UDSF文件内函数均需使用static修饰符，且UDF中以#include "udsf_xxx.c"形式引用
*/
#include "udsf_sys_api.c"
#define LOOP_TIME 8
static void udsf_lpw_enter(void) __attribute__((unused));
static void udsf_lpw_exit(void) __attribute__((unused));
static void udsf_full_speed(void) __attribute__((unused));
static void udsf_iic_wakeup(uint8_t id) __attribute__((unused));
//static int udsf_wakeup_check(void) __attribute__((unused));

//static int udsf_wakeup_check(void)
//{
//    return (GPIO->INTSTR & (1 << 7));
//}
// chirp dir: 0-row       data_inc = UDF_RANGE_USE
//            1-column    data_inc = UDF_VEL_NUM

static void udsf_lpw_enter(void)
{

    USCI1->CFG1  = 0x00000051;  // USCI1 RX disable
	GPIO->PMODE  = 0x00000000 | GPIO0_2<<2 | GPIO0_5<<5;
    PINMUX->MUX0 = 0x00000000;
    PINMUX->MUX1 = 0x00000000;

    //  GPIO->INTEN = 1 << 7;    // RX pin interrupt enable
    //  GPIO->INTSTR = 1 << 7;   // RX pin interrupt flag clear

    //all off
    //SYSC->CLK_SEL = BBE_ISO_SEL_MSK | LRC_SEL_MSK | LRC_DIV128_MSK; // lrc and lrc/128
    ANACFG_SET(&paramANA_Venus->ana4); //all off
    SYSC->CLK_SEL = BBE_ISO_SEL_MSK | LRC_SEL_MSK | LRC_DIV128_MSK;   // lrc and lrc/128
}
static void udsf_iic_wakeup(uint8_t id)
{

    RTC_T * RTCX = RTC0;
    int  i = LOOP_TIME;

    if (id > 0)
    {
        RTCX = RTC1;
    }

    while (1)
    {
        //      GPIO0_5 = 1;
        if (GPIO->INTSTR &= (1 << 6))
        {
            GPIO->INTSTR |= (1 << 6);
            i = LOOP_TIME;

//            GPIO0_12 = 0;
            if (GPIO0_6 == 0)
            {
//                              GPIO0_2 = 0;
                SYSC->CLK_SEL = 0x10100;//BBE_ISO_SEL_MSK | LRC_SEL_MSK | 0;  //切1M

                while (--i)
                {
                    if ((GPIO->INTSTR &= (1 << 6)) || (GPIO0_6 != 0))
                    {
                        //                      GPIO0_5 = 0;
                        break;
                    }
                }

                if (i == 0)
                {
                    sUDF_global.state = 2;
                                      
                    return;
                }
            }
        }

        if ((RTCX->IRQ_CFG & 0x1) != 0)
        {
            sUDF_global.rtc_f = 1;
            break;
        }

        //      WDT->STR = 1;
    }

    //  RTCX->IRQ_CFG |= RTC_IRQ_MASK_Pos;   // rtcx irq disable
    //  RTCX->IRQ_CFG |= RTC_IRQ_CLEAR_Msk;  // rtcx irq flag clear
    //  SYSC->CLK_EN  |= (RTC0_PATTERN_SW_Msk<<(4*id));// rtcx clk disable
}
static void udsf_lpw_exit(void)
{

    SYSC->CLK_SEL = BBE_ISO_SEL_MSK | LRC_SEL_MSK;//0x00010100;       // lrc and lrc/1
    ANACFG_SET(&paramANA_Venus->ana1); //40M
    //  GPIO->PMODE = paramFunc->gpio_pmode;

    /* wait delay for osc ready*/
    udsf_slow_clk_delay500us();
}

static void udsf_full_speed(void)
{

    SYSC->CLK_SEL = 0x0;  //enable 40M clk
    //  GPIO->INTEN = 0;

    RTC0->IRQ_CFG |= RTC_IRQ_CLEAR_Msk;   // rtc0 irq flag clear
    RTC1->IRQ_CFG |= RTC_IRQ_CLEAR_Msk;   // rtc1 irq flag clear

    USCI1->CFG1 =  0x00000053;             // USCI1 RX TX enable
	GPIO->PMODE  = 0x00000024;
	PINMUX->MUX0 = paramFunc->gpio_pmux0;
    PINMUX->MUX1 = paramFunc->gpio_pmux1;

    SYSC->SWRST &= ~(1 << 11);
    SYSC->SWRST |= (1 << 11);
    BBE_OPCLEAR(BBE_CLEAR_CFAR | BBE_CLEAR_P2 | BBE_CLEAR_FFT);
}
#endif
